The present invention relates to a method of forming a semiconductor structure, and particularly to a method of employing a photoresist profile, direction of ion implantation, and arrangement of semiconductor regions in a semiconductor substrate to enable adjustment of ion implantation dose across multiple semiconductor regions with a single ion implantation mask.
There are many instances in semiconductor chips in which transistor matching is of paramount importance; that is, two identically designed transistors are to perform identically to one another. One such instance is in a six-transistor static random access memory (6TSRAM) cell. In this cell there are two halves to the cell (called here left and right), each side consisting of three transistors. Cell functionality is optimum when the three transistors in the left half match exactly (in threshold voltage and drive current, for example) their corresponding transistor in the right half. As there is often a large number of such cells in a design, the area consumed for such a cell is of great importance also, and the cell is to be made as small as possible. The small spacings employed therein poses additional challenges to transistor matching.
In view of the above, there exists a need for a method of manufacturing a semiconductor structure in which tightly packed transistors match as identically as possible.
Typically, an ion implantation mask enables two different dopant profiles, one formed underneath an area covered with a photoresist and protected from implantation of ions and another formed outside the area covered with the photoresist and implanted with ions. However, transistors located in close proximity to the mask edge may experience partial blockage of the implanted ions, and this partial blockage can vary with mask alignment.
Therefore there exists a need for a method of manufacturing a semiconductor structure in which the ion implantation is not sensitive to the mask placement over normal process variations, and yet small spacing is employed.